2026 Intern - SoC Design Verification Engineer

NXP

Responsibilities:

  • Work with the global design team to do complex SOC verification for digital/analog design.
  • Responsible for verification plan quality, verification result/design target cross-check, test case development to have better coverage and verification quality.
  • Co-work with functional verification team to ensure the complex SoC verification functional coverage and quality.

Requirements:

  • Bachelor degree in electronics engineering or equivalent, master degree or above is preferred;
  • Good knowledge of digital logic and circuit
  • Good understanding of Verilog/system Verilog, and digital design debug flow. UVM experience is a plus;
  • Good knowledge of gate-level simulation/debug flow.
  • Experience of Cadence, Synopsys verification tools in Unix/Linux environment;
  • Good communication is a must, English language proficiency

More information about NXP in Greater China...

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Confirmed 10 hours ago. Posted 2 days ago.

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