In the ASML cleanroom inhouse performance tests are executed on all scanner types. The supporting wafer processing (e.g. coating and developing wafers) and wafer cleaning occurs in the Service Lab. In order to guarantee quality, for each performance test maximum delay times are defined wherein wafer processing should be performed. As a result, some wafers need to be processed again because delay time are exceeded.
The main challenge for your internship will be to preserve high quality standards, while targeting to reduce costs and lower material waste. We want to enable more efficient Service Lab operations by optimizing process delay times, while preserving high quality.
Your tasks will include:
This is a bachelor/master apprentice (gain work experience) or bachelor graduation (thesis) internship. The duration is minimum for 5 months, 4-5 days per week. Starting date is in September.
To be a perfect match for this internship, you:
Other requirements you need to meet
This position requires access to controlled technology, as defined in the United States Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with candidates who are immediately eligible to access controlled technology.
ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.
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