NXP

The Senior Verification Engineer is responsible for defining Design Verification strategy, plan and implement it for an IP or sub-system.

Objectives & Deliverables:

• You will be responsible for the pre-silicon verification of digital IP modules, IP subsystems, and/or part of the SoC top level for highly secure microcontrollers:
• Take ownership of submodules, subsystem and part of top-level testbenches.
• Track and document the whole verification activity.
• Own the IP/subsystem level verification documentation including reviews.
• Suggest the methodology updates and/or improvements of the DV flow.
• Keep yourself updated with latest verification methodology and tools.
• Develop, debug, and modify the test environment for different platforms (RTL, FPGA, silicon). 
• Define the verification strategy for specific IP modules.
• Define and code test cases and debug these on the design models (RTL, Power aware RTL, Gate Level, FPGA) and on silicon.
• Define goals for the verification coverage, implement appropriate methods to measure the verification coverage, and enhance the test cases until coverage goals are met for assigned IP/sub system.

Required Skills

• Degree in Electrical Engineering or Computer Science, with 7 to 9 years of experience on IP/Sub-System/SOC Verification
• Proven experience in testbench design and development using UVM methodology for IP/Subsystem.
• Experience in Microcontroller and Microprocessor architecture, RISC Cores, Interconnect, Cache Coherency.
• Experience in protocols like AHB/AMBA, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers.
• Advanced knowledge of Verilog and System Verilog languages.
• High proficiency in Metric Driven Verification concepts, functional and code coverage.
• High proficiency in directed and constrained random methodologies.
• Good knowledge of assertion based verification.
• Experience in execution of Gate Level Netlist simulation with back-annotated timing.
• Understanding of software development for embedded CPUs, and experience in developing and debugging software.
• Experience with debugging of designs pre- and post-silicon, in simulation and on the bench.
• Experience with smart card architectures or security controllers would be a plus. 

Personal Traits

• Rigorous and methodical with strong analytical skills.
• Flexible and adaptable with an ability to verify and debug on different platforms and abstraction levels.
• Tenacity in tracing and finding problems, with attention to detail.
• Ability to question and identify weaknesses in specifications, tool environments, etc.
• Good team player with ability to work across functional teams and sites.

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