Synopsys

Requisition Number

49153BR

Job Description and Requirements

Job Description:

As part of your role, you will be responsible for developing and oversee design benchmarking cases for advanced process nodes.

This will involve collaborating closely with IP and EDA teams, and perform various tasks such as synthesis, DFT, ARP, RC extraction, ECO, STA and power analysis.

Additionally, you will be tasked with implementing design automation flow and data analysis infrastructure.

You will also work with the market team and end users to promote signoff guidance and customize signoff specifications to meet the needs of end user.

Furthermore, you will conduct research in the field of AI/ML to enhance signoff quality and productivity.

Qualification:

• Took VLSI courses (VLSI, Physical Design Automation, Design for Test and Logic Synthesis)
• Had experience or interested in design automation flow, synthesis, APR, STA, power analysis or circuit simulation
• Had experience in scripting techniques using Perl, TCL or Python
• Had experience or interested in applying ML/AI methodology in VLSI

Hiring Location

TAIWAN - Chupei, TAIWAN - Hsinchu, TAIWAN - HsinChu Science Park

Hire Type

Intern

Job Category

Interns/Temp

Job Subcategory

Intern (Technical-Engineering)

Country

Taiwan

Business Title (Title for Job Posting)

Intern- R&D Engineering