Synopsys

Requisition Number

48797BR

Job Description and Requirements

AMS Layout Design Intern

We're looking for AMS Layout Design Intern to join our team.

Does this sound like a good role for you?

You will be part of a layout team developing physical layout of high speed analog integrated circuits. As mixed-signal layout intern you will be exposed to SerDes PHY layout for PCIe, SATA, XAUI, and other protocols. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team. In this role, you will be responsible for designing physical layout of custom analog and digital blocks for multi-Gb/s SERDES IP.

Key Qualifications

• Basic knowledge of analog layout
• Design for porting (ie. design so as to enable ease moving layout across multiple foundry nodes)
• Knowledge of signal integrity issues (ie. clock/data routes, differential routing, shielding)
• Aware of layout techniques to mitigate ESD, latchup
• Familiarity with custom digital layout 
• Knowledge of design for reliability (ie. EM, IR)
• Knowledge of layout effects (ie. matching, reliability, proximity effects)
• Layout tool: Custom Designer (similar to Cadence)
• Verification tools: ICV, Calibre
• Exposure to scripting (ie. TCL, PERL)

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

Hiring Location

ARMENIA - Yerevan

Hire Type

Intern

Job Category

Interns/Temp

Job Subcategory

Intern (Technical-Engineering)

Country

Armenia

Business Title (Title for Job Posting)

Intern (Technical-Engineering)