The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design.
The individual is responsible from RTL synthesis to GDS implementation and optimization of design including floor planning, routing, timing convergence (STA) including related design ECO and physical verification for fulfilling all Technology & reliability related rules, such as DRC/LVS/Electromigration/IR drops.
The individual contributes to problem solving related to physical design. Contributes to define best Physical design strategy per technology node.
Requirements:
Master degree, major in microelectronics, electronic engineering , computer science or relevant disciplines.
Knowledge and experience in SoC design, with backend ones being a plus.
Script coding ability Perl/TCL/Python in Linux/Unix environment.
Excellent communication skills and collaboration spirit.