NVIDIA

NVIDIA’s invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars. Today, we are increasingly known as “the AI computing company.” We are actively looking to add the smartest brains to our company and usher in the next wave of computing.

NVIDIA Silicon Solutions group is seeking a versatile engineer to be part of a High Speed SERDES IO validation team. You will dive into high-speed interconnects like PCIe, USB3, Ethernet, UFS, etc. - perform bringup, electrical validation, with strong emphasis on stability and efficiency. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from artificial intelligence, consumer graphics, self-driving cars, and more

What You'll Be Doing:

• Lead the planning and electrical validation of PCIe/Ethernet/USB3/UFS interfaces for NVIDIA GPUs, CPUs, and SOCs.
• Engage proactively with multi-functional engineering teams, including system architects, mixed-signal design, software/firmware, hardware/software quality assurance, operations, and application engineering to facilitate the design, development, debugging, and release of upcoming products.
• Drive schedule, tuning guide, customer critical issues and design feedback.
• Investigate technically complicated HSIO bugs and help drive debug efforts across various teams.
• Coordinate with logic design, circuit design, board design, simulation, diagnostics, ATE, firmware, driver, and marketing teams to drive the chip into production.
• Develop new methodologies to improve the HSIO validation process from both quality and effort-efficiency point of view.

What We Need to See:

• BS or MS in Electronics Engineering (or equivalent experience) and a minimum of 3 years of proven experience.
• Excellent knowledge of signal integrity concepts, silicon characteristics, and high-speed/SERDES electrical validation and related tuning.
• In-depth understanding of PCIe (or similar) protocol and related electrical concepts and hands-on on electrical validation.
• Good knowledge of lab equipment (DSOs, BERT, Protocol/Logic analyzers).
• Understanding of firmware/driver structures and their interaction with Hardware.
• Strong EE fundamentals, scripting languages (Perl, Python) to write direct test/debug programs for stress and failure analysis.
• Strong project management, problem-solving, collaboration, and interpersonal skills.

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