AMD

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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THE ROLE:

We are seeking a seasoned floorplan architect to own and deliver product floorplans. This is a highly visible role and does require collaboration across business, architecture, micro-architecture, platform, CAD, design, PD, customer, and packaging teams. This role also requires proficient problem solving skills, lateral thinking, and deep understanding of floorplan constraints and best practices. 

THE PERSON:

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You have had significant success driving floorplans, physical design, architecture, product roadmaps and product requirements. You are meticulous about accounting for power, performance and area while driving schedule and managing cost. You are ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

KEY RESPONSIBILITIES:

• Drive initial floorplan through pathfinding, identify critical cuts, identify routing channels, minimize whitespace with goal of minimum die size
• Support the floorplan through the design until tapeout
• Collaborate with CAD to continuously improve the floorplanning tools, flows, and methodology
• Dive deep into any area as needed and work across more than one program at a time
• Identify tradeoffs (pro/con) for key decisions potentially without having all data present

PREFERRED EXPERIENCE:

• Floorplan experience with CPU and GPU SOCs
• SOC and block level experience with CTS, Place and Route, and Timing closure
• Proficient in scripting (TCL/Python/Perl/etc) and automation
• Highly proficient in floorplanning, DPR, reducing whitespace, and how these choices impact packaging/platform
• History of implementing RTL to GDS2 flow
• Knowledge of Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR, Formal Equivalence
• Handling different PNR tools - Synopsys Fusion Compiler, ICC2, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk, Cadence Genus, Innovus.

ACADEMIC CREDENTIALS:

Bachelor’s or Master’s degree in related discipline preferred

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At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.