Google

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Minimum qualifications:

• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of of experience in high-performance CPU or AI accelerator logic/RTL design including microarchitecture definition and Power Performance Area optimizations.
• Experience with CPU or AI accelerator integration with SOC.

Preferred qualifications:

• PhD in Electrical Engineering or Computer Science.
• Experience leading front-end design for modern processor components or AI accelerators.
• Experience with ARM Instruction Set Architecture.
• Experience with SOC design, architect and integration.

About the Job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

Pulling on your technical and leadership expertise, you lead end-to-end research projects in multiple areas of expertise across data center facilities and manage a team of direct reports working on equipment installation, troubleshooting and debugging.

Responsibilities

• Lead and manage a team of engineers in the TW CPU design organization working on CPU and/or AI accelerator design and integration into SOC.
• Develop CPU subsystem front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
• Propose performance enhancing microarchitecture features, and work with Software, Architect and Performance teams for trade-off studies. 
• Deliver designs meeting PPA(Power Performance Area) goals with production quality. Become familiar with modern techniques, interpret the techniques into design constructs, and languages in order to provide guidance to and participate in the performance evaluation effort.
• Work with the Verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals.