SIPG PDE (Server/IP Design Team) is looking for an Analog Layout Design Engineer to join our team, developing the industry's best high speed communication devices. Take part in our design innovation chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
Your responsibilities will include, but not limited to:
Experienced Hire
Shift 1 (Israel)
Israel, Haifa
Israel, Jerusalem, Israel, Petah-Tikva
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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