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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.
- Experience with CPU or AI accelerator integration with SoC.
Preferred qualifications:
- PhD in Electrical Engineering or Computer Science.
- Experience leading front-end design for modern processor components or AI accelerator.
- Experience with ARM Instruction Set Architecture.
- Experience with SoC design, architect and integration.
About the Job
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Participate in developing CPU subsystem.
- Develop CPU subsystem front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
- Propose performance enhancing microarchitecture features, and work with Software, Architect and Performance teams for trade-off studies. Communicate the pros and cons of microarchitecture enhancements.
- Deliver designs meeting Power, Performance and Area (PPA) goals with production quality. Be familiar with modern techniques, interpret the techniques into design constructs, and languages in order to provide guidance to and participate in the performance evaluation effort.
- Work with the Verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals.
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