Job Details:

Job Description: 

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!

• Life at Intel
• Diversity at Intel

At Intel, we work every single day to design and manufacture silicon products as the fundamental building blocks that empower people's digital lives. Do you love contributing to flagship products in cutting edge process nodes? Do you love solving technical challenges that no one has solved yet? Do you enjoy working with cross-functional teams to deliver solutions for products that impact customers' lives?

Intel's Design Methodology Enablement (DME) team is looking for an experienced senior physical design engineer to help define tools, flows, and methodologies (TFM) for development of Intel's flagship Networking and Edge products.

As a Senior Physical Design Engineer, you will play an integral role in contributing to the development, deployment, and support of the physical design environment used across multiple SoCs. The candidate is expected to develop and support solutions in a wide variety of activities related to synthesis (Fusion Compiler), hard macro integration, placement, CTS, route, timing correlation, and overall physical convergence. Candidate is also expected to participate in the development of next generation of TFM and work closely with both external and internal vendors.

You will be responsible for, but not limited to: 

• Participating and leading others in developing TFM automation and enhancements.
• Making contributions towards the physical design system and physical implementation (floorplanning, power grid insertion, placement, CTS, route).
• Troubleshooting a wide variety of physical design complex issues and apply proactive intervention.
• Working closely with RTL teams, SD teams, and EDA tool vendors.

The Senior Physical Design Engineer should possess the following behavioral traits.

• Excellent teamwork skills including ability to work with multiple and remote groups worldwide.
• Motivated self-starter, with strong ability to work independently as well as in a team environment.
• Strong verbal and written communication skills in English.
• Flexibility and maturity in facing uncertainties and changing priorities/responsibilities.
• Act with velocity and a strong sense of urgency.
• Respect cultural diversity and sensitivity.
• Agility in learning, improving, and innovating.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

What we need to see (Minimum Qualifications):

• Master's degree in electrical or computer engineering with 7+ years of industry experience or bachelor's degree with 9+ years of industry experience.
• 5+ years’ experience with physical design methodologies and sub-micron technology Place and Route (ICC2 / Fusion Compiler) with physical verification knowledge (DRC/LVS/Antenna).
• 5+ years’ experience with Tcl, Perl, or Python coding skills to automate design process and improve efficiency in EDA tool suites.

How to Stand out (Preferred Qualifications):

• Master's degree in electrical or computer engineering with 12+ years of industry experience or bachelor's degree with 15+ years of industry experience.
• 3+ years of experience in the following:
• Static timing analysis (PrimeTime), Electromigration (EM), IR-Drop, Xtalk analysis (PT-SI).
• Design rule checking (DRC), layout versus schematic (LVS), and Antenna checks, and familiarity with industry-standard verification decks and rule sets.
• Formal equivalence verification experience (Synopsys Formality or Cadence LEC).

Amazing Benefits!

Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

US, California, Folsom, US, Massachusetts, Hudson, US, Oregon, Hillsboro, US, Pennsylvania, Allentown, US, Texas, Austin

Business group:

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$162,041.00-$259,425.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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