Job Details:

Job Description: 

Job Description:

Join Intel and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So, join us and help us create the next generation of technologies that will shape the future for decades to come.

In this role you will be a key member of a team working to ensure that our Foundation IP (FIP) meets the highest quality standards. These IPs include memory compilers, standard cells, eFuse, and GPIO.

You will create reference designs using Intel-designed Foundation IP. You will utilize industry standard tools to implement and run RTL to GDS Flows to qualify FIPS.You will perform all aspects of the SoC design flow on these designs to ensure that the Foundation IP meet stringent quality requirements.

Additional responsibilities for this position include:

• Scripting and automation of the physical design and debug flows.
• Running internal IP QA flows on Foundation IP.
• Development of new IP-level quality checks.
• Interaction with EDA tool vendors to debug issues and develop QA flows.
• Interaction with our internal Foundation IP development teams to summarize and debug issues.
• Training and mentoring other team members to teach best practices for SoC design and debug.

The ideal candidate should exhibit behavioral traits that indicate:

• Solid interpersonal skills including written verbal and presentation communications.
• Highly organized with the ability to prioritize and multi-task effectively.
• Excellent analytical and problem-solving skills.
• Effective team player with continuous learning mindset
• High motivation and results orientation

Design Enablement

What we offer: We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth. As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results.

We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation).

We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and much more creative perks that make Intel a Great Place to Work.

We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must possess a BS degree with 4+ years of experience or MS degree with 3+ years of experience or PhD degree with 1+ years of experience in Electrical/Computer Engineering or a related field.

4+ years of semiconductor industry experience.

2+ years of experience with physical synthesis and place and route using Synopsys Fusion Compiler or Cadence Genus/Innovus tools in advanced nodes (10nm or less).

Preferred qualifications:

4+ years of experience in the following areas:

• Physical synthesis and place and route using Synopsys and Cadence tools.
• Experience with end-to-end digital design flows and methodologies.
• EDA tools, flows, and methodologies for SoC design and IP library development.
• Scripting and automation of physical design flows.
• An understanding of the IP EDA views /QA checks used for digital design flows.
• Experience interacting with customers.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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