Synopsys

Requisition Number

48376BR

Job Description and Requirements

About Synopsys

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

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Business Area Description

The Solutions Group high-quality, silicon-proven semiconductor IP solutions for SoC designs. The Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, signal/power integrity analysis, and IP prototyping kits. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.

Job Descriptions

• Develop and review verification plan
• Create testcase and perform RTL verification using SystemVerilog, UVM
• Debug the failing testcase, work with RTL design team analyze the root-cause
• Perform and evaluate verification regression
• Perform gate-level simulation with SDF back-annotation

Skills Requirements

• BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications.
• From 2+ years of experience in a similar role
• Familiar with design verification flow at IP or SoC level
• Knowledge of SystemVerilog, UVM, and complex module testbench is a big plus
• Knowledge of Analog Mixed Signal design, High-Speed Interface IP is a big plus
• Good debugging capability and problem-solving skills

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

Hiring Location

VIETNAM - Ho Chi Minh

Hire Type

Employee

Job Category

Engineering

Job Subcategory

ASIC Digital Design

Country

Viet Nam

Business Title (Title for Job Posting)

ASIC Design Verification Engineer