ByteDance

Responsibilities

Team Introduction

Our team is building industry leading, highly efficient and scalable video codec hardware solutions (FPGA and ASIC) from the ground up to better serve our billions of users. We are looking for strong software and firmware engineers to design algorithms, C-model, and firmware for advanced video encoding and processing implemented in dedicated hardware accelerators. The successful candidate will be part of a fast growing team that includes algorithm, architecture, software, firmware, and hardware design and verification experts with a dedication to technical excellence and a passion to build large-scale and high-performing video platforms and services.

Responsibilities:

• Lead and participate in all aspects of the software/firmware development life cycle, including roadmap definition, requirement analysis, architecture design, feature design and development etc.
• Analyze, design, develop, and debug firmware for image processing, video processing and video transcoding on FPGA/ASIC environment
• Develop C/C++ software for embedded real-time OS environment
• Design the rate-control algorithm and quality analysis for transcoding
• Conduct ASIC firmware bring-up on different simulation platforms, including palladium/Haps/FPGA.
• Cooperate to support different ByteDance business, including LIVE/VOD/RTC/Picture processing, etc.

Qualifications

Minimum Qualifications:

• BS degree or above in Electrical/Computer Engineering, Computer Science, or equivalent fields
• Excellent software design, problem solving and debugging skills
• Solid programming skills in C/C++ - At least 3 years of direct related experience in FW development
• Knowledge in video compression, including codec standards such as H.264/AVC, H.265/HEVC

Preferred Qualifications:

• M.S. or PhD in Computer Science or Electrical Engineering
• Experience in FW development and optimization for image/video codec HW accelerators
• Understanding of perceptual video quality, including principles behind metrics such as PSNR, SSIM and VMAF.
• Knowledge of state-of-the-art video codecs, such as H.266/VVC, AV1/AV2 is a big plus.
• Knowledge in image/video and signal processing, both algorithm design and implementation (for example, Encoding rate Control, scene change detection, sharpen filter, ROI, adaptive GOP structure and etc)
• Experience working on NPU&DSP development
• Experience with embedded processors like ARM Cortex M and R series or RISC-V architecture and boot mechanism, interrupt priorities and experience with configuring peripherals etc.
• Collaborative mindset, with solid written and verbal communication skills