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In this position you will use your physical design expertise to do physical implementation of challenging designs in 2nm/3nm/5nm technology nodes . The person should have hands on experience on netlist->gds implementation of multimillion gates including but not limited to floorplanning
place and route, STA, physical verification(LVS?DRC/ANT/ERC). Work closely with designers and must be able to write TCL script to perform custom/semi-custom standard cells placements/clock tree adjustments/routing to achieve design specs. Good timing analysis and CTS knowledge is required. Full chip assembly and experience on spice simulation is a plus.
Job Requirements:
Plus:
Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $120,000 - $192,000
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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