AMD

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

Overview:

The Gate Level Design Verification Engineer position focuses on gate-level design verification for next-generation high-performance x86 processor designs and related IPs. The role involves post-synthesis verification, gate-level simulation, and the development of methodologies and tools to ensure the highest quality in processor designs.

Job Responsibilities

• Perform post-Synthesis Verification of next generation high performance Microprocessor designs and related IPs.
• Develop, maintain, and improve the methodology used for gate-level low-power verification and netlist validation.
• Develop tools for Gate-Level build and simulation automation as needed, aiming for multiple-project compatibility and ease of use.
• Simulate and debug directed stimulus to find bugs in the microprocessor design at gate level; verify the functionality and verify conformance to the specifications.
• Document testbench component plans and drive reviews with peers and stakeholders.
• Independently develop quality, timely and cost-effective solutions.

Required Education and Skills:

• BS Computer Science/Engineering Degree.
• Excellent organizational, time management, and communication skills, including English language.
• Knowledge of one or more scripting languages including shell, Perl, Python, and/or Ruby.
• Good understanding of the Unix system.
• Familiarity with HDL languages (Verilog preferred).
• Experience in hardware/logic simulators (e.g. VCS/Modelsim/EDAPlayground).
• Knowledge of version control systems such as Git and/or Perforce is a plus.
• Knowledge of x86 computer architecture is a plus.

#LI-PL1

#LI-Hybrid

#Iasi

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.