Google

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Minimum qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
• 2 years of experience working on system-level signal integrity design, or 1 year of experience with an advanced degree.
• Experience with component-level and integrated system testing and high speed digital interconnect design.
• Experience with SI/PI design techniques, including printed circuit board routing rules.
• Experience with lab measurements and analysis, including Oscilloscopes, Vector Network Analyzer (VNA), or Time-Domain Reflectometer (TDR).

Preferred qualifications:

• Master's degree or PhD degree in Materials Science, Electrical Engineering, Computer Engineering, Physics, or a related field.
• Experience with Allegro, ADS, Matlab, PowerDC, PowerSI, HFSS, SIwave, CST, passive and active cable development and testing, and product design for mass volume production.
• Experience in product development for mass volume production design, emphasizing signal integrity and direct experience with SerDes lab validation.
• Familiarity with Ethernet, PCIE, and DDR standards, PCB, connector, or cable design and assembly processes, including materials and component selection.
• Excellent data analysis skills and great attention to detail.

About the Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

The team will design and build the hardware, software and networking technologies that power all of Google's services.

As a Signal Integrity and Power Integrity Engineer, you will design and build the systems that form the foundation of computing infrastructure. You will work on everything from low-level circuit design to large system design, overseeing these systems through to manufacturing. You will help shape the machinery powering data centers, impacting millions of Google users.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities

• Collaborate with board, package, and chip design engineers to drive system Signal Integrity (SI) design, explore SI/Power Integrity (PI), layout and Design for Manufacturability (DFM) trade-offs, and ensure that the product functions as required.
• Work with executive engineers to drive Application-Specific Integrated Circuit (ASIC), package, board, connector, and cable vendors to develop next-generation interconnect technologies.
• Perform system interconnect bring-up and qualification (in collaboration with test engineers), including chip configuration to ensure adequate margins.
• Drive solutions for SI/Cabling issues with design engineers, Printed Circuit Board (PCB) designers, and the system team.