2026 Intern- SoC DFT intern

NXP

Responsibilities

  • Be responsible for ATPG/MBIST/Boundary Scan taks.
  • Be responsible for DFT verification tasks.
  • Have good collaboration with other team members to achieve project targets.

Requirements

  • Bachelor or master’s students studying in Microelectronics, Electronics, Electrical Engineering, Computer Science or relevant disciplines
  • Good knowledge and experience in DFT implementation methodology, flow optimization and DFT coverage improvement. Mentor tool is a plus.
  • Strong problem solving skills, self-motivated and good team player.

More information about NXP in Greater China...

#LI-6650

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Confirmed an hour ago. Posted 8 days ago.

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