Qualcomm

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

QCT is currently seeking digital verification engineers for the mixed-signal ASICs that support QCTs mobile platforms for next generation 5G RFIC/PMIC/Codec technologies.

Successful candidates will be working on the following:

• Block/Subsystem/SoC level digital IP verification using constrained-random coverage methodologies at both RTL and Gate Level. The skills involved includes SV/UVM/UVM_REG/Randomization/Coverage/SVA.

Preferred Qualifications

• Experience in writing Test Plans independently
• Experience with debugging RTL & Gate level simulations
• Experience with Functional Coverage &Code Coverage
• Experience with Scripting in perl, python, tcl
• Experience in planning Verification architecture, review testbench/ testplans with juniors, identify coverage gaps, propose alternate methods for coverage
• Should have been involved in leading a chip DV effort
• Silicon Debug Experience a plus.
• Experience with Mixed Signal Designs involving DSP a plus
• Modeling Experience with Matlab, Octave a plus

Minimum Qualifications

Required: Bachelor's, Electronics or EE

Preferred: Master's, VLSI, Electronics or EE.

5+ years ASIC design, verification, or related work experience

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

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