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Hardware IP Verification Methodology Lead - Hybrid (UK, USA or Canada)

AMD inc. is seeking an experienced Hardware IP Design Verification Lead to drive the strategy, execution, and delivery of top down functional and formal verification for complex hardware IP blocks and subsystems. This individual will be responsible for defining and driving the implementation of a modern design validation strategy including mentoring a team of verification leads and engineers, defining advanced verification methodologies, collaborating with cross-functional teams, and ensuring the highest standards of quality and reliability for AMD’s portfolio of silicon IP products.

Key Responsibilities

• Define a top-down Design Verification Strategy for the next generation IP.
• Work with all Subsystem leaders to define a DV strategy that fits into the overall strategy.
• Lead the development and deployment of cutting-edge verification tools and methodologies.
• Assess existing testbench infrastructure and work with the teams to agree priorities for development/improvements.
• Work with the project management team to align on DV schedule and resources.
• Track DV metrics across the project and help to make real-time corrections to DV planning and execution. Escalate risk and opportunities to engineering and project Management.
• Take part in DV Strategy, Planning and Signoff reviews and act as an ultimate gate for DV signoff.
• Foster a culture of innovation, top quality, and technical excellence

Minimum Qualifications

• Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field
• Minimum 15 years of relevant industry experience in SOC and IP Design Verification.
• Demonstrate deep expertise in Verification tools and Methodologies (e.g. UVM, Formal Verification, FPGA/Emulation, System level verification) as well as in RTL design (Verilog, SystemVerilog) and scripting languages (Python, Shellscript)
• Proven track record of successful tape-outs on time of major IP and SOCs.
• Experience leading large multi-national teams on complex semiconductor projects.
• Solid experience verifying memory interfaces (LPDDR, HBM, GDDR), communication protocols (Mipi, HDMI, SPI, USB, etc)
• Knowledge/Interest in AI applications to Si DV flow
• GPU IP experience a definitive plus
• Excellent communication, leadership, and problem-solving skills, with the ability to work effectively within global, cross-functional teams

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.