OMNIVISION

Description

• Be responsible for digital design of image sensor, SoC integration and IP design, analysis, integration, and validation; Work closely with back-end team in floor-planning, timing closure and DFT;
• Conduct image sensor array/analog related timing control design and STA; Perform chip bring-up, validation and debugging; Design, integrate and validate ISP data pipes according to PRD/design specification and system architecture of SoC CIS products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality verification, DFT, using Simvision, EDA tools such as Prime Time, cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc.;
• Conduct design verification and modeling using SVA, Python, Perl, C++/C, and HLS; Work with sensor digital and analog engineers for system design, integration and validation; Work with algorithm engineers for module level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co-simulation. Perform software algorithm validation and cost estimation.
• Work with algorithm and application engineers for image tuning and qualification; Conduct silicon validation, debugging and tuning.

Requirements:

Master’s degree in Electrical Engineering, Computer Engineering, or related fields.

Required knowledge and/or skills from the graduate level course work:

• VLSI circuit and system design with Verilog,
• Static timing analysis,
• power and area estimation,
• Functional verification using ModelSim,
• Digital logic circuit design,
• Implementation of CPU datapath and control,
• Memory hierarchy (caches, main memory, virtual memory) organization and management,
• Pipelined processors.

Annual base salary for this role in California, US is expected to be between $151,091- $155,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.