The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.
The Opportunity
Responsible for design and validation of mixed-signal sensors, as well as failure analysis of mixed-signal Asics. Use variety of advanced tools based on specific application requirement, including Mathwork’s Simulink and Matlab scripting, programming in C for embedded processor, Verilog HDL, use of SystemVerilog and verification using Universal Verification Methodology (UVM-SV) as well as using Xilinx backend tools for synthesis and P &R tools.
What You'll Do
Requirements
Bachelor’s degree in Electrical Engineering, Computer Science, or Microelectronics and 2 years of experience with: - Logic Design using either Verilog, System Verilog, or VHDL; - performing RTL Simulation debug and root cause analysis; or
Master’s degree in Electrical Engineering, Computer Science, or Microelectronics, including coursework applicable to VLSI systems, digital signal processing, and digital design.
Hybrid office/home work schedule
At Allegro, we are committed to providing a harassment-free environment of mutual respect to fuel innovation through inclusive thought collaboration. Allegro is an Equal Opportunity Employer and does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, national origin, veteran status, parental status, or any other basis covered by appropriate law. Allegro makes hiring decisions based solely on qualifications, merit, and business needs at the time.
Eligible applicants must reside in a state where Allegro currently has an office location: This includes New Hampshire, Massachusetts, Texas, and Michigan. Certain positions (such as field sales roles) may be exempt from this requirement.
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