Synopsys

Descriptions & Requirements

Job Description and Requirements

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a motivated and enthusiastic engineer with a degree in Electrical or Electronic Engineering. You have foundational knowledge in logic and RTL design using VHDL, Verilog, or System Verilog, and are eager to apply your learning to real-world projects. You have exposure to FPGA synthesis and place & route tools through internships or work experience, and you are keen to develop these skills further. Your programming skills in languages such as C/C++, Python, MATLAB, or Tcl are solid, and you are comfortable navigating Linux/Unix and Windows environments. You are an excellent communicator, well-organized, and detail-oriented. You are driven by a passion for innovation and excited to contribute to the validation and prototyping of SerDes products as part of a collaborative team.

What You’ll Be Doing:

• Implementing and validating soft IP portions of SerDes products on FPGA platforms.
• Integrating IP and designing wrapper and support blocks.
• Creating simulation models and defining testbenches.
• Performing validation through simulation and hardware testing.
• Collaborating with a cross-functional engineering team, including analog and digital designers.
• Utilizing state-of-the-art equipment in our R&D lab for high-accuracy, high-speed testing and debugging.

The Impact You Will Have:

• Driving the successful implementation of FPGA prototypes for system-level testing.
• Ensuring the reliability and performance of SerDes products through meticulous validation.
• Contributing to the continuous improvement of prototyping methodologies and processes.
• Enhancing the efficiency of product validation cycles, leading to faster time-to-market.
• Collaborating with diverse teams to solve complex engineering challenges.
• Playing a pivotal role in the innovation and development of next-generation technologies.

What You’ll Need:

• Degree in Electrical/Electronic Engineering or related field.
• Experience with logic/RTL design using VHDL, Verilog, System Verilog.
• Proficiency in FPGA synthesis, place & route, and debug tools.
• Understanding of timing closure methodologies.
• Proficiency in C/C++, Python, MATLAB, and Tcl programming languages.
• Experience with Perl, Shell scripting, and development in Linux/Unix and Windows environments.
• Familiarity with board schematics and layouts.

Who You Are:

• Excellent communicator and team player.
• Highly organized and detail-oriented.
• Self-motivated with strong problem-solving skills.
• Passionate about innovation and technology.
• Adaptable and able to thrive in a fast-paced environment.

The Team You’ll Be A Part Of:

You will join our dynamic Prototyping and System Level Validation team, working alongside experienced Analog & Digital designers and hardware engineers. Our team is committed to excellence and innovation, leveraging state-of-the-art equipment and methodologies to deliver high-performance solutions. We value diversity and collaboration, fostering an inclusive environment where every team member can thrive and contribute to transformative projects.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.