达摩院 High - Performance Interconnect Research Scientist 北京

Alibaba Group

Job Description

We are Alibaba DAMO Academy, which is dedicated to exploring the unknown through scientific and technological research and innovation. The driving force behind the Academy is the pursuit of the betterment of humanity.

Our Computing Technology Lab is located in Sunnyvale, CA, the heart of Silicon Valley. We are the bridge of global talents and technologies to our corporate headquartered in China.

Our current focus areas include advanced research topics in computing, memory/storage, and interconnect technologies that can revolutionize today's computing systems with holistic innovations ranging from system architectures to VLSI designs, to enable new computing capabilities for improving energy efficiency and performance across multiple application domains, including both high-performance and embedded computing.

We are looking for strong candidates of high-performance interconnect research scientist, to research and develop state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from multi-core on-chip interconnects to those within systems, and clusters. Areas include (but not limited to)

  • Novel and innovative interconnect architectures
  • Multi-core processor interconnects
  • System-on-Chip Interconnects
  • Advanced chip-to-chip communication technologies
  • Protocols and interfaces for inter-processor communication
  • Survivability and fault-tolerance of interconnects
  • High-bandwidth and low-latency I/O

You will be part of a world-class team, led by veteran Silicon Valley senior executives and technical experts!

The responsibilities of this position include, but not limited to:

1. Research and develop advanced hardware and software architectures and prototypes for high-performance interconnects

2. Model and analyze the bandwidth, latency, power, and/or area of advanced interconnects

3. Optimize the designs based on the trend of emerging workloads (e.g., AI)

4. Collaborate with the SoC design team

5. Collaborate with business units who deploy the solutions

Job requirements

Successful candidates should meet one or more of the following requirements:

1. Ph.D. degree in EE/CS or equivalent major, minimum of 2 years of industrial experiences, or MS degree with 5 years of experience

2. Experience in existing inter-connect protocols and/or cache coherent protocols (e.g., EMIB, QPI, PCIe, CCIX, CXL, NVLink)

3. Experience in hardware architecture design

4. Excellent communication skills and self-motivated, team-working altitude.

5. Fluent English speaking and technical writing is a must.

6. (Nice-to-have) Additional experience in any of the following

a. High speed SerDes

b. FEC

c. Micro-architecture/RTL design

d. Both large-system and small-system interconnects

e. System software (OS/BIOS)

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Confirmed 30+ days ago. Posted 30+ days ago.

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