Tensilica, a Cadence company, delivers configurable processor IP and DSP solutions powering AI, vision, audio, and communications workloads. Its Xtensa® architecture enables highly optimized, domain-specific designs with industry-leading performance and efficiency.
The C Compiler team builds the toolchain that unlocks this performance. Working on LLVM-based compilers for Xtensa processors, the team drives code generation, architecture-aware optimizations, and real-world workload performance. In close partnership with hardware teams, they enable new capabilities and deliver production-grade tools used by leading semiconductor and systems companies.
Responsibilities:
Requirements:
Nice to Have:
The annual salary range for San Jose, CA is $ 108,500 to $201,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits.Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.