Apple

Summary

Posted: Jul 17, 2025

Weekly Hours: 40

Role Number:200612862

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn’t have imagined, and now, can’t imagine living without. It’s the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Austin, Texas. Optimize and implement designs for chips in hardware devices. Design synthesis to convert functional Register Transfer Level code to digital logic gates in physical chip design. Work on Power integrity checks to ensure that the various power domains and their interfaces are complete. Work on Signoff checks to develop and maintain flows that help verify the overall quality of the chip designs. Engineer Change Order implementations to meet the overall functionality and timing closure of the design. Work with the CAD team and tool vendors to identify and quickly resolve any flow or integration issues. Create innovative flows and processes to support new chip designs. Perform Lint checks to ensure the overall quality of Register Transfer Level code meets the guidelines. Optimize logic designs to achieve low power, low area, high performance and timing goals. 40 hours/week.

Minimum Qualifications

• Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field and 2 years of experience in the job offered or related occupation.
• Experience and/or education must include:
• Using VLSI design and timing to evaluate engineering tradeoffs.
• Using knowledge of HDL to understand the functionality of the designs and suggest improvements.
• Scripting in Perl and Python to automate tasks.
• Using physical design concepts to improve timing, reduce congestion and to implement engineering change of orders (ECOs).
• Using synthesis techniques and Boolean optimization to recover area, power and to fix setup and hold timing violations.
• Using simulation and debugging tools for RTL and Netlist validation.
• Using GPU architectures to understand dataflow and steer synthesis and optimizations techniques.

Preferred Qualifications

• N/A

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.