Qualcomm

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

GPU Verification Engineer

Selected candidates will be part of the GPU HW team which is passionate about developing and delivering the best GPU Cores for all Qualcomm Snapdragon SOC products. Qualcomm GPU is an industry-leading solution which is driving the benchmarks in mobile computing industry and the future of mobile AR/VR.

The overall GPU pre-Si verification team in Bangalore is currently heavily involved in the following

• Formal verification – Block level property based FV sign-off
• UVM/SV based constrained random test bench for functional verification
• Subsystem level TB for complete GPU workload analysis and compliance
• Emulation platforms to analyze performance and pipeline bottlenecks
• Power Aware & Gate level simulations to deliver a high-quality GPU implementation
• Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug triage.

In the role of GPU Formal Verification Engineer, your project responsibilities will include the following,

• Develop high quality formal verification test benches to verify complex designs in GPU. It will involve creating & owning the test plan, test bench, performing debugs , deep bug hunting using formal tools and developing sign off quality testbenches and ensuring coverage closure & convergence metrics
• Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces
• Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality
• Collaborate with worldwide architecture, design, and systems teams to achieve all project goals

Currently, we are looking for candidates who can match one or more of the profiles listed below,

Strong knowledge of Formal Property Verification & Assertion Based Verification, Formal Test planning and coverage analysis, Formal sign off & proof convergence strategies Hands-on experience with industry standard formal tools, such as JasperGold, VCFormal or Questa Formal Strong System Verilog Assertions knowledge, proficiency in Verilog, and scripting (Python, Perl, Tcl) is required Knowledge of GPU pipeline design is a plus, not mandatory Understanding of equivalence based methodologies such as DPV and SEQ is desired Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver

Experience

• Minimum 5 years of Design verification experience
• Senior positions will be offered to candidates with suitable years of experience and proven expertise matching the profiles listed above

Education Requirements

• BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent courses from reputed universities

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

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