Doctoral Thesis: Verification of Generic IPs (f/m/div)

Infineon

The industrial doctorate at Infineon: Pursue a doctoral degree at a university and gain professional experience simultaneously - an ideal start for your career. Advance your research with us and profit from our vast network of doctoral candidates and the expertise of a university.Mentorship is handled by both professors and dedicated Infineonemployees.

We are offering a doctoral thesis with focus on verification of generic IPs. In industry many IPs are made reusable, such that they can be usedin several, potentially initially not considered applications. Low additional effort and reduced cost for reuse is achieved by making theIP generic. This can be done by hardware generators and/or HDL generate statements. These are controlled by configuration mechanisms as generics/parameters or configuration files. Verifying these components faces several problems: • If only one setting is verified then parts of the code built withother settings might not be verified. Further also newly generated codemay have bugs as it has not been verified due to settings • Verifying all combinations is in many cases not possible due to hugenumber of options • Generating formal properties, testcases and doing ad-hoc verification can be done for all generated options today. In contrast otherverification collaterals as test plans and addressing of unplanned debug session to fix a bug still lack automation.

As all of these options have disadvantages, a new way for verifying generic components shall be developed. Approaches may be, but are notlimited to • Ensuring that every code line impacts the finally built design atleast once. For example code that is not impacted by generics – i.e.impacts any design - can be verified in this way • Generalization of numeric values, e.g. finding a way to guaranteethat a set of address widths works fine if at least one of them isverified • Use of generic testplans •Application driven verification, also including software

We offer: • Realistic, challenging, and impactful problems • The possibility of putting problems into an overall context • Collaboration with colleagues and teams that is seldom found anywherein the world in terms of depth and breadth • A potential 3 months research stays at top universities worldwide and/or Europe wide cooperation of experts as part of funded research activities • An Infineon internal PhD community

The thesis will be written in cooperation with Technical UniversityMunich and under the supervision of Dr. Sebastian Prebeck and Prof. Dr. Wolfgang Ecker.

Job Description

The tasks within the thesis will consist of:

  • Modelling of formal properties for generic IPs with generic functionality and timing
  • Property generation using a Python-based hardware generation framework
  • Definition of a HW/SW co-verification methodology for correctness verification at application level
  • Generation of generic test plans and other verification collaterals
  • Coverage metrics for generic models
  • Methodology validation on industry IPsM (e.g. RISC-V)

This doctoral thesis should also study existing approaches and prove the applicability and get feedback to enhance the methodology.

The learnings out of the thesis will be:

  • Formal Verification for industrial applications
  • Formal HW/SW co-verification methodologies
  • Generic hardware IP architectures and their definition
  • Methodology of 'code generation' for formal properties in an industrial environment
  • Modeling and Meta-Modeling
  • Various Modeling and Abstraction concepts and their implementation

Your Profile

A doctoral student is a research enthusiast,

› …whose interests are scientific research combined with the passion for Infineon’s innovative products and applications.

› …who enjoys working in an industrial environment in combination with an Infineon partner university.

› …who appreciates open communication and the contribution of an international environment.

› …and is thus an excellent candidate for a further academic or industrial career after completion of their thesis.

As the ideal candidate you:

  • Graduated in computer engineering, electrical engineering or are lated field with very good grades
  • Are interested in complex, interdisciplinary and interlinked tasks and should like to solve them together with colleagues
  • Possess good presentation skills that help you to present challenging issues clearly and simply
  • Are curious and open as well as interested in learning and trying out new things
  • Are experienced in metamodeling, (template-based) code generationand/or model-driven architecture
  • Possess knowledge in object-oriented programming with languages such as C ++ and Python and embedded programming with C and / or Assembler
  • Have good knowledge of digital design and RTL modeling in VHDL and /or (System) Verilog and embedded system architectures
  • Have knowledge in embedded programming with C
  • Are interested in generation and recursive application of generation, e.g. generation of generators
  • Possess very good language skills in English and ideally German

#WeAreIn for driving decarbonization and digitalization.

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Are you in?

The central R&D organization „Design Enabling and Services“ (DES) provides the design environment to the different Infineon product development teams. With state-of-the-art design methods, building blocks and a wide range of product development services DES supports Infineon's advanced IC development from early high-level system models to verified products ready for manufacturing.

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We look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting.

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Confirmed 6 hours ago. Posted 30+ days ago.

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