Posted: Dec 20, 2022
Role Number:200451013
Come join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborating with people across different functional areas, and thriving during crisis times, we encourage you to apply.
Key Qualifications
Description
As an ASIC/FPGA Prototyping Design Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will integrate industry standard and custom hardware IP into SoCs. You will work closely with SoC architects, IP developers to develop SoCs that meets the power, performance and area goals for Apple devices. You will help define the processes, methods and tools for design and implementation of large complex SoCs. You will develop and maintain methodology and flows checks for your design. Interact with our verification team to ensure appropriate validation and coverage goals are met. You'll ensure security assumptions for the chip are accurately implemented within the block/s. Collaboration with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design process. - Creates emulation/Field Programmable Gate Array (FPGA) models from a register transfer level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools - Develops hardware and software collaterals and integrates it with the emulation/FPGA model - Tests and debugs the emulation/FPGA model and collaterals - Defines and develops new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-silicon and post-silicon functional validation as well as software development/validation - Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform - Collaborate with and provides guidance to pre-silicon Validation teams for optimizing pre-silicon validation environments, test suites and methodologies for emulation efficiency - Develops and applies automation aids, flows and scripts in support of emulation ease of use and improvement of equipment utilization - Front-end ASIC design experience - Micro-architecture and design of high-performance DMAs/data transfer engines/interconnects - Computer architecture, SoC fabrics/interconnects, memory controllers, arbitration, flow control, caching, etc - RTL design and verification - System Verilog, scripting and modeling languages (e.g. Python, Perl, C) Lint, formal equivalence - Verification test benches, coverage analysis, formal verification - Knowledge of bring-up and debug of FPGAs and silicon - Familiar with common on-chip bus protocols such as AMBA (AXI, AHB, APB) - Collaboration, schedule and resource planning, and task/team management skills
Education & Experience
BS+ 3 years of relevant experience. MS preferred.
Additional Requirements
Pay & Benefits