Nokia Mobile Networks (MN) is responsible for managing Nokia’s infrastructure assets and making select investments in advanced research and development to drive innovation for 5G applications. The Architectures, Technologies, and R&D Foundation (ATF) division within Mobile Networks creates valuable IP for Nokia by engaging with leading business-to-business (B2B) customers to enhance their competitive advantage.
ATF’s 5G DFE & RFIC program, located in Sunnyvale, California, innovates and develops differentiating wireless infrastructure solutions for Nokia’s 5G products. The team is multi-disciplinary and enjoys fruitful collaborative partnerships with top universities, international research institutes and network operators. Be part of this exciting team and successfully drive the future of wireless communications!
We are now looking for Senior Engineer, 5G Analog/Mixed-Signal (I&V) to join our team.
In this role, the successful candidate will focus on verification of RF / Mixed-Signal designs at both block- and chip-levels. Creating simulation test benches and behavioral models (in tandem with IC designers and systems engineers) to validate designs will be a pivotal function within this role. In addition, you will also contribute to system integration, including simulations bring-up and debug, requiring a demonstrated proficiency using Verilog-A, Verilog-AMS, and Cadence suite of simulators.
· Proficiency with Cadence tools and methodologies, including ability to define design and verification methodologies
· Proficiency in scripting (e.g., using Perl, OCEAN, Matlab) to automate verification flows.
· Understanding of RF / Analog simulation techniques to enable work with RF / Analog IC designers
· Proficiency in designing and validating high-performance AMS behavioral models in Verilog-A for blocks such as: Baseband filters, OTAs, Bandgap, as well as RFIC building blocks (e.g., LNA, Driver Amplifier, PA, Mixers, Synthesizers, etc.)
· Experience in executing verification plans with IC design and application-level engineers for top- and block-level debugging.
· Experience in developing and bring-up AMS simulation environment, including: drivers, monitors, checkers and assertions.
· Experience in creating electrical rule checks (ERC)
· Experience in creating regression tests including participation in design verification reviews
· Experience in replicating post tape-out bugs (in the simulation environment), including validating bug-fixes and/or other workarounds
· MS in Electrical Engineering (or related discipline) desired.
fNokia System on Chip Development