DFT Design Verification Engineer


Company Type
  • Job Number: 40276991
  • Austin, Texas, United States
  • Posted: May. 12, 2015
  • Weekly Hours: 40.00

Job Summary

The DFT Design Verification Engineer will be on a small team, which owns the complete DFT pre-silicon verification and support for silicon bring-up of a GPU core. This person will create and maintain verification test bench components and environments, need to be proficient with scripting and System Verilog, as well as be able to come up with test plans to validating IP.

Key Qualifications

  • The ideal candidate will have relevant experience including:
  • Experience with verification language such as SystemVerilog is a plus
  • Experience with Verilog is a plus
  • Knowledge of IEEE 1500/IEEE 1149
  • Experience with Verdi and debugging problems with waves.
  • Experience defining coverage space, writing coverage model, analyzing results
  • Experience working under strict schedule deadlines with the ability to manage multiple priorities
  • Experience with Perl, Shell scripting, Makefiles, TCL a plus
  • Excellent communication skills and ability to collaborate


•Develop verification plans in coordination with design leads and architects •Create and maintain verification test bench components and environments •Generate directed and directed random tests •Create functional coverage points, analyze coverage, and enhance test environment to target coverage holes •Create automated verification flows for block verification •Apply knowledge of hardware description languages (VHDL/Verilog), hardware verification languages (SystemVerilog/UVM/OVM), and logic simulators to verify complex designs



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Confirmed 15 hours ago. Posted 30+ days ago.

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