In this role, you will be at the center of a PHY design effort interfacing with architecture, CAD, timing and PD design teams, with a critical impact on delivering best in class PHY designs. You will be required to do designs of best in class PHY design
As a DDR PHY Design engineer you will be involved with all phases of PHY design of high performance DDR interface from architecture, RTL to delivery of our final GDSII.
Your responsibilities include but are not limited to:
Participate in the architecture of next generation DDR PHY. Design DDR PHY from architecture to micro-architecture. RTL implementation of the micro-architecture. Participate in clearly defining specification, testing and verification of the DDR PHY design. Work closely with CAD, PD teams to implement RTL design into GDS. Run various design verification flow at PHY level and provide guidelines to other designers. Participate in establishing CAD and design methodologies for correct by construction designs. Assist in flow development for PHY integration.
BSEE / MSEE is required