Graphics Verification Engineer


Company Type
  • Job Number: 29862090
  • Orlando, Florida, United States
  • Posted: Jan. 25, 2017
  • Weekly Hours: 40.00

Job Summary

The Graphics Verification Engineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores. This includes deep understanding of the micro-architectural details of their block and how it works the broader GPU design. A strong computer architecture background, preferably in graphics, and a solid foundation in verification methodology will be leveraged to close testing coverage with high confidence..

Key Qualifications

  • The ideal candidate will have at least 3+ years of relevant experience including:
  • Expertise with verification language such as SystemVerilog/UVM/OVM, Verilog/VHDL; Specman experience is a plus
  • Expertise with HDL simulators and waveform viewers
  • Experience defining coverage space, writing coverage model, analyzing results
  • Experience working under strict schedule deadlines with the ability to manage multiple priorities
  • Graphics architecture and programming (OpenGL/OpenCL) highly desired. Strong knowledge of computer architecture, general purpose microprocessor and memory sub-system micro-architecture in lieu of graphics experience.
  • Experience with Perl, Shell scripting, Makefiles, TCL a plus
  • Excellent communication skills and ability to collaborate


Develop verification plans in coordination with design leads and architects

Create and maintain verification test bench components and environments

Generate directed and directed random tests

Run simulations and debug design and environment issues

Create functional coverage points, analyze coverage, and enhance test environment to target coverage holes

Create automated verification flows for block verification

Apply knowledge of hardware description languages (VHDL/Verilog), hardware verification languages (SystemVerilog/UVM/OVM), and logic simulators to verify complex designs

Work with other block and core level engineers to ensure seamless verification flow



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Confirmed 30+ days ago. Posted 30+ days ago.

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