Senior Formal Verification Engineer

NVIDIA

We are currently seeking an experienced Verification Engineer with strong CPU and formal verification fundamentals to work in Nvidia’s CPU Formal Verification team. Nvidia builds CPUs that power the coming wave of self-driving cars with high end SoCs such as Xavier (https://blogs.nvidia.com/blog/2016/09/28/xavier/). Xavier has a custom "Denver" class CPU which provides high end performance while being compliant with stringent automotive standards such as ISO26262.

This position will have you crafting and optimizing formal verification flows across CPU projects and resolving tool issues for design teams with tool vendors. Additionally, you'll verify the micro-architecture using formal verification tools to employ the latest model checking and equivalence checking techniques. You will be expected to understand the design & implementation, define the verification scope, and ensure design correctness. You will use advanced formal techniques to obtain full proofs, or sufficient bounded proofs, of the design while working with architects, designers, pre- and post-silicon verification teams to accomplish your tasks. You must be capable of leading the formal verification effort, coordinating verification coverage across functional groups, and clearly conveying verification results and holes to our team.

What you’ll be doing:

  • The specification, implementation, and maintenance of an integrated end-to-end formal verification flow for the formal verification team.
  • Interact with Vendors on tool related issues and provide guidance for tool improvements.
  • Guide and train team members on effective usage of FV tools.
  • Developing scripts to automate the verification process.
  • Review formal setups and proofs with design and verification teams.
  • Maintain and extend assertion libraries, including support for both simulation and FV.
  • Identifying key behaviors for verification of DUT and creating a verification plan.
  • Developing verification environment including environment assumptions, assertions and cover properties in context of the verification plan.
  • Applying various FV techniques to prove correctness of digital designs.
  • Debugging RTL to identify causes of failure scenarios.

What we need to see:

  • You have a Bachelors/Masters/Phd in Computer Science or electrical engineering from a reputed engineering college.
  • You have a minimum 5+ years of industry or research experience on formal techniques for verification.
  • Strong analytical skills to tackle hard problems.
  • Excellent command of scripting.
  • Strong knowledge of architectures of CPU designs and digital logic.
  • Good understanding of abstraction techniques for effective verification.
  • Hands-on experience with HDLs such as Verilog / System Verilog.
  • Understanding of temporal logic assertions.
  • Preferable experience with a variety of Formal Verification Tools (e.g. Jasper, IFVCF, SMV, SPIN)
  • Strong communication skills are required along with the ability to work in a dynamic product oriented team and collaborate effectively across sites.

Ways to stand out from the crowd:

  • You have worked on various pieces of CPU unit/microarchitecture verification
  • You have worked on complex verification projects that had used formal techniques for closure.
  • You have the experience of collaborating with geographically diverse cross-functional teams
  • A history of mentoring junior engineers and interns a huge plus.

With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our elite engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.

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Confirmed 7 hours ago. Posted 30+ days ago.

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