Senior Digital Validation Engineer

NXP

NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, we are driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets. 

The BL STI (Secure Transaction and Identification) fosters NXP’s secure-by-design approach for IoT and smart cities, enabling manufacturers and consumers to protect private information while interacting in the most convenient way through RFID and NFC-enabled applications. 

With MIFARE we have a market share of over 77% in transport ticketing and more than 8.5 billion RFID chips have been shipped for inventory and supply chain management. STI enabled the broad adoption of NFC solutions, which can be found in more than 80% of all NFC-equipped smartphones and 80% of NFC-enabled POS terminals. Further, our secure elements and the SmartMX products create unique solutions, trusted by governments, brands and transit authorities.

We are now looking for STI a Senior Digital validation engineer.

In this role, you will lead one of the STI post silicon validation and characterization cycles from test plans definition to PRQ.

Your responsabilities:
•    Work with different stake-holders on validation strategy, and definition (chip-lead, silicon architect, product manager, etc.)
•    Assign tasks to team members, and be the technical focal point for the validation activities.
•    Monitor validation progress, and support debug activities, to allow root-cause of potential silicon issues.
•    Be part of the validation team, and own one of the blocks/IPs

•    Understanding new chip features and being able to define test plan to cover it’s functionality.
•    Implementing test plan, and validate on pre-silicon platform
•    Be the first line of defense when failure occurs to isolate (setup, code, artifacts, silicon issues, logic/physical, identify blocks, etc.). 
•    Once isolated, working with domain experts to define debugs and come up with a root cause. Assisting in driving a fix. 
•    Maintain and create automation scripts/flows for self-consumption as well as others. 
•    Able to summarize debugs/findings in clear and crisp way.

Your profile:

•    Strong system level understanding of CPU/SoC architecture, Memories (Flash, RAM).
•    Comfortable working primarily in a lab environment
•    Strong C/C++ skills, experience in low-level drivers development
•    Strong scripting skills in one of the major languages: eg. Perl, python, Tcl, bash
•    Good experimental technique, techniques of problem localization and root-cause
•    Hands-on experience in lab, and familiar with lab equipment
 

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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Confirmed 15 hours ago. Posted 30+ days ago.

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