SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. ASIC DESIGN ENGINEER
This is a senior digital ASIC design role in the development of broadband satellite modem hardware solutions. This position includes significant responsibilities in one or more of the following areas: requirements and specifications, micro-architectural design and definition, digital design (RTL) and verification, synthesis, static timing analysis, and power estimation and optimization.
Project deliverables may include specification documents, System Verilog RTL code, simulation models, test benches, gate-level netlists, and timing constraints. As a senior digital ASIC designer, you will be responsible for all aspects of digital ASIC design focusing on RTL design, verification, logic synthesis, and timing analysis. You will design both or either data path processing and/or control systems for advanced mixed analog/digital integrated circuits in System Verilog.
PREFERRED SKILLS AND EXPERIENCE:
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